Journal of Basic and Applied Research International

This manuscript presents the design and simulation of an ultra-low-power LC voltage-controlled oscillator for low-voltage radio-frequency applications. The proposed circuit is implemented in 0.18 μm CMOS technology and uses an NMOS-only cross-coupled LC-tank topology biased in the subthreshold region. Subthreshold biasing is employed to reduce dc power consumption while maintaining the negative resistance required to compensate for tank losses and sustain oscillation. An additional PMOS transistor is placed at the drain side of the cross-coupled structure to regulate current flow and support low-power operation. Simulation results show that the oscillator operates from a 0.7 V supply and consumes approximately 0.175 mW of dc power. The tuning range extends from 5.09 GHz to 6.19 GHz, corresponding to approximately 17.5%. At an oscillation frequency of 6.19 GHz, the simulated phase noise is -108.6 dBc/Hz at a 1 MHz offset. The calculated figure of merit is approximately -192.1 dB. These results indicate that the proposed subthreshold-biased LC VCO can provide a low-power oscillator solution for energy-constrained RF transceiver systems under simulated circuit conditions. The operating frequency range may also be used with frequency division to support selected wireless communication bands. Overall, the design demonstrates the potential of subthreshold CMOS operation for reducing oscillator power consumption while retaining acceptable simulated phase-noise performance.